Simultaneous Multithreading
نویسندگان
چکیده
Current research in processor technology and computer architecture is motivated primarily by the need for greater performance. In this context, it is well understood that the performance gain from improving the memory system alone is limited, and using system Level Integration (such as supporting graphics/sound on chip) can only lead to marginal performance benefits. The most significant gain can be achieved by increasing parallelism in execution. There exist two kinds of parallelism in typical programming workloads, Instruction Level Parallelism (ILP) and Thread Level Parallelism (TLP). Modern superscalar architectures are designed to capture ILP in programs, while multithreaded and multiprocessor systems are designed to capture TLP or parallelism across threads/processes. The better solution then would be to exploit both ILP and TLP ; TLP from either multithreaded parallel programs or from multiprogramming workload, and the ILP from each thread. Neither superscalar nor multiprocessor (MP) can capture ILP and TLP in its entirety and these are inherently incapable of adapting to dynamic levels of ILP and TLP. This is the primary motivation for a new architecture of processors called Simultaneous Multithreading (SMT).
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Modeling and Analysis of Simultaneous Multithreading
In simultaneous multithreading, several threads can issue instructions in each processor cycle. A simple and versatile timed Petri net model of simultaneous multithreading is proposed and is used to compare the performance of architectures with and without simultaneous multithreading. Performance results are obtained by event-driven simulation of net models and are verified by state–space–based...
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